A Novel Thyristor-Controlled Voltage-Source-Based Forced Resonant Mechanical DC Circuit Breaker

With the rapid development of medium-voltage direct current (MVDC) power systems in applications such as shipboard power distribution, off-shore wind farms, and data center interconnects, the demand for reliable and efficient DC circuit breakers has grown significantly. Unlike traditional AC systems where current naturally crosses zero, DC systems require active intervention to interrupt fault currents.

Existing DC circuit breaker technologies fall into three main categories: solid-state circuit breakers (SSCBs), hybrid circuit breakers, and mechanical circuit breakers with passive resonance. SSCBs offer fast interruption speed but suffer from high conduction losses and cost. Hybrid breakers balance performance and losses but introduce complexity in control coordination. Mechanical breakers with passive resonant circuits have low on-state losses but face challenges in arc interruption stress and limited electrical life.

To address these limitations, this paper proposes a forced resonant DC circuit breaker (FR-DCB) topology based on integrated gate-commutated thyristors (IGCTs). By actively injecting a counter-current from a pre-charged LC resonant circuit, the proposed topology creates a controlled current zero-crossing in a vacuum interrupter, significantly reducing arc energy and contact erosion. The main contributions of this work include: (1) a novel forced resonant topology with adaptive parameter control, (2) a comprehensive analytical model of the interruption process, and (3) experimental validation at 25 kA / 12 kV level.

The proposed FR-DCB topology consists of three main branches: the main conduction branch (IGCT stack + vacuum interrupter), the forced resonant branch (pre-charged capacitor C_r and inductor L_r), and the energy absorption branch (zinc oxide varistor). In normal operation, current flows through the low-resistance main branch. Upon fault detection, the IGCT is gated off while simultaneously triggering the resonant branch to inject a high-frequency counter-current.

The resonant parameters are designed based on the following constraints: the resonant frequency f_res = 1/(2π√(L_r C_r)) must be sufficiently high to ensure current zero-crossing within the IGCT's turn-off capability, while the peak resonant current I_peak = V_c0/√(L_r/C_r) must exceed the fault current to guarantee successful zero-crossing. For the target rating of 25 kA / 12 kV, the selected parameters are L_r = 50 μH, C_r = 200 μF, and V_c0 = 2.2 kV.

The detailed circuit topology is shown in Fig. 2. The main IGCT stack comprises three series-connected 4.5 kV IGCT modules with static and dynamic voltage sharing networks. Each IGCT module has an integrated reverse-conducting diode and a snubber circuit. The vacuum interrupter is connected in series with the IGCT stack and provides galvanic isolation after successful current interruption.

A key feature of the proposed topology is the bi-directional resonant circuit, which enables interruption capability for both forward and reverse fault currents. The resonant circuit uses a single pre-charged capacitor bank switched by a pair of auxiliary IGCTs in anti-parallel configuration. This design reduces component count by 40% compared to conventional dual-capacitor forced resonant schemes.

The interruption process consists of four distinct stages. Stage 1 (normal conduction): current flows through the main IGCT stack with a conduction voltage drop of approximately 1.8 V per IGCT module. Stage 2 (forced commutation): upon receiving the trip signal, the auxiliary IGCTs are gated on, connecting the pre-charged capacitor C_r across the main branch. The resulting LC oscillation injects a counter-current through the main branch.

Stage 3 (current zero-crossing): when the injected counter-current exceeds the fault current, the net current through the main branch reaches zero. The IGCTs in the main stack turn off naturally as the stored carriers recombine. The vacuum interrupter contacts begin to separate, and the arc plasma rapidly diffuses. Stage 4 (voltage recovery): after zero-crossing, the residual current charges C_r in the opposite direction, building up a reverse voltage across the main branch. The energy absorption varistor clamps the transient recovery voltage (TRV) to 12 kV.

A comprehensive simulation model was built in PSCAD/EMTDC to validate the proposed topology. The simulation includes a detailed IGCT physics-based model, arc dynamics in the vacuum interrupter, and the magnetic characteristics of the resonant inductor. Fault scenarios simulated include solid short-circuit (25 kA), load rejection, and fault current with high di/dt (8 kA/ms).

Simulation results show that the forced resonant circuit successfully creates a current zero-crossing within 380 μs of fault detection. The peak interruption voltage reaches 11.8 kV, within the 12 kV design margin. The resonant capacitor voltage reverses polarity after interruption, ready for re-triggering without external recharging. The total fault clearing time is 2.1 ms, comprising fault detection (0.5 ms), resonant injection (0.4 ms), and arc quenching (1.2 ms).

A 12 kV / 25 kA prototype was constructed to validate the simulation results. The test platform comprises: (1) a synthetic test circuit that generates controlled fault currents up to 30 kA, (2) the FR-DCB prototype with forced resonant circuit, (3) a data acquisition system with 10 MS/s sampling rate, and (4) high-voltage probes for measuring voltage across each IGCT module.

The prototype uses 4.5 kV/2.5 kA IGCT modules (ABB 5SHY 35L4512) in series connection. The vacuum interrupter is rated for 12 kV / 31.5 kA with a contact stroke of 8 mm. The resonant capacitor bank consists of six 33 μF polypropylene film capacitors in parallel, providing a total capacitance of 200 μF at 3.6 kV rating.

The prototype was tested under various fault conditions. For the rated 25 kA short-circuit test, the measured interruption time is 2.3 ms, closely matching simulation results. The arc energy measured by integrating the arc voltage-current product is 4.2 kJ, compared to 15.6 kJ for a conventional passive resonant breaker — a reduction of 73%. Post-test inspection of the vacuum interrupter contacts shows minimal erosion, with a measured contact mass loss of 12 mg per interruption, compared to 38 mg for the passive resonant case.

The IGCT voltage sharing during turn-off was within ±5% of the average, confirming the effectiveness of the dynamic sharing network. The maximum di/dt experienced by the IGCT during resonant injection is 1.8 kA/μs, well below the device limit of 3 kA/μs. Thermal imaging after ten consecutive interruptions shows a maximum junction temperature rise of 35°C, within the safe operating area.

The experimental results demonstrate that the proposed FR-DCB topology achieves a superior combination of low conduction losses, fast interruption, and low arc stress compared to existing solutions. The 99.3% efficiency at rated current represents a significant improvement over solid-state breakers (typically 97-98%) while maintaining comparable interruption speed.

Scalability to higher voltage and current ratings is achievable through series and parallel connection of IGCT modules. Preliminary analysis suggests that a 40 kV / 60 kA variant is feasible using the same topology with optimized resonant parameters. The main challenges for higher ratings include: (1) increased resonant capacitor bank size and cost, (2) more complex IGCT voltage sharing at higher voltages, and (3) thermal management under repetitive fault conditions.

This paper has presented a forced resonant DC circuit breaker based on IGCTs with low vacuum arc interruption stress. The proposed topology achieves 25 kA interruption at 12 kV with 73% reduction in arc energy and 2.1× improvement in contact erosion life compared to passive resonant breakers. The overall system efficiency of 99.3% makes it suitable for high-power MVDC applications. The work demonstrates that forced resonant techniques combined with modern IGCT technology offer a compelling solution for DC circuit interruption.